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Staff Hardware Design Verification Engineer (ASIC / Mixed-Signal DV)

Spectraforce

San Diego, California


2 hours ago

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Staff Hardware Design Verification Engineer (ASIC / Mixed-Signal DV)
Spectraforce
San Diego, California

2 hours ago

Job Description

Job Role: Staff Hardware Design Verification Engineer (ASIC / Mixed-Signal DV)
Location: San Diego, CA 92121 (100% Onsite)
Duration: 12 Months (Potential Extension)



Job Summary
Client is seeking an experienced Staff Hardware Design Verification Engineer to join its Mixed-Signal Design Verification team. The engineer will be responsible for verifying high-speed mixed-signal IPs used in next-generation 5G, AI/ML, Compute, IoT, and Automotive products. The role covers the complete verification lifecycle—from architecture and test planning through pre-silicon verification, tape-out, and post-silicon validation.
 
Key Responsibilities
  • Develop and execute pre-silicon and post-silicon verification plans.
  • Build and maintain verification environments using SystemVerilog/UVM.
  • Develop testbenches, assertions (SVA), test cases, and coverage models.
  • Perform debugging, regression analysis, and coverage closure.
  • Work closely with digital design, analog design, modeling, subsystem, and SoC integration teams.
  • Support PHY-level verification, subsystem integration, SoC validation, and post-silicon bring-up.
  • Participate in mixed-signal, low-power, formal, and gate-level verification activities.
 
Required Skills
  • Strong expertise in SystemVerilog and UVM verification methodology.
  • Experience with ASIC simulation and formal verification tools such as:
 
  • VCS
  • Xcelium/NCsim
  • Questa/Modelsim
  • VC Formal
  • JasperGold
  • 0-In
  • Experience writing SystemVerilog Assertions (SVA) and verification checkers.
  • Strong debugging and verification skills.
  • Knowledge of high-speed SerDes protocols including:
  • PCIe
  • USB 3.x/4
  • UFS
  • MIPI (CSI/DSI)
  • HDMI
  • DDR/LPDDR PHY
 
 
Preferred Skills
  • Mixed-signal IP verification experience with technologies such as:
 
  • PCIe
  • USB
  • CXL
  • C2C
  • D2D
  • MIPI
  • UFS
  • DDR
  • PLL
  • ADC/DAC
  • Sensors
 
  • Experience with:
  • UPF-based low-power verification
  • Gate-level simulation
  • Formal verification
  • Analog/mixed-signal simulation
  • Scripting using Python or Perl.
  • Experience developing Verification IP (VIP) for SerDes Controller/PHY is a plus.
 
Education
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
 
Required Experience
5+ years of ASIC Design Verification or related experience.
  
Applicant Notices & Disclaimers
  • For information on benefits, equal opportunity employment, and location-specific applicant notices, click here
 
At SPECTRAFORCE, we are committed to maintaining a workplace that ensures fair compensation and wage transparency in adherence with all applicable state and local laws. This position's pay range is $64.80/hr - $81.01/hr.

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