Job Title: Optical Engineer, Design Analysis
Duration: 24 Months
Location: Redmond WA
Job Description:
We are looking for an Optical Engineer with passion for new technology development to join our team, whose mission is to deliver beyond state-of-the-art display system technologies for consumer near to eye displays at our research and development facilities. We are looking for a candidate with experience in novel integrated photonics device design and metrology either as part of their PhD or industry experience.
Optical Engineer, PIC Design & Analysis Responsibilities
Collaborate with leadership, TPMs, and researchers on Photonic Integrated Circuit (PIC) designs aligned with program priorities.
Design and develop full PICs, from component blocks to full circuits, focusing on active device integration.
Generate and verify fabrication-ready layout files compliant with foundry PDKs for external fabrication.
Conduct systematic design analysis, including optimization and parametric studies, to inform design decisions.
Support the full design-to-fabrication workflow, from concept through tapeout, with cross-functional teams and external partners.
MINIMUM QUALIFICATIONS
MS or PhD degree in Electrical Engineering, Optical Sciences, Physics, or a closely related field.
3+ years of hands-on experience in the design, simulation, and layout of photonic integrated circuits (PICs), for visible or IR wavelengths on Si / SiN / LiNbO / BTO platforms.
3+ years of experience with photonic device simulation and electromagnetic modeling tools for component and circuit-level analysis (e.g., Lumerical FDTD/MODE/DEVICE, Ansys Photonics, Synopsys RSoft, or COMSOL Multiphysics).
2+ years of experience with PIC layout tools and GDSII generation (e.g., KLayout, Cadence Virtuoso, gdsfactory, or equivalent), including familiarity with foundry PDK integration and design rule verification.
2+ years of experience with scientific programming languages such as Python or MATLAB for design automation, analysis, and scripting.
1+ years of experience supporting or executing PIC tapeouts at a commercial semiconductor foundry, with fabrication process constraints (e.g., propagation losses, sidewall roughness, etch non-idealities).
PREFERRED QUALIFICATIONS
3+ years experience in active photonic integrated circuit (PIC) design, fabrication and validation for visible wavelengths on LiNbO / BTO platforms.
3+ years of experience in design space exploration and sensitivity analysis for photonic circuits, including statistical performance and yield modeling.
3+ years of experience in one or more photonic simulation tool suites such as Lumerical, Synopsys, COMSOL, or equivalent.
2+ years of experience with photonic circuit-level simulation tools (e.g., Lumerical Interconnect, Synopsys OptSim, or VPIphotonics) for system-level performance evaluation.
2+ years of experience in photonic device characterization and test, including optical and electro-optic measurements.
1+ years experience with fiber optics, free space optics, PIC packaging, and device characterization.
1+ years experience with semiconductor fab processes and understanding of fabrication-induced performance limitations, including optical losses, sidewall roughness, and process variability.
Demonstrated ability to incorporate fab constraints into PIC design (e.g., minimum feature sizes, bend radii optimization, tapering strategies, and layout considerations to mitigate scattering and coupling losses).