Job Title: Silicon DV Engineer III
Location: Remote
Duration: 6 Months
 
Job Description:
Top Non-Negotiable Skill Sets Required for This Role:

• Power and performance modeling or DV (C, SystemC, SystemVerilog, or MATLAB)
• Strong DV background (test plan development, test writing, UVM)
• Experience with low power verification (UPF)
• Experience with both static (i.e. VC LP) and dynamic (i.e. VCS NLP) power-aware verification flows

Duties:

• Responsible for low power verification including both dynamic and static verification
• Write and augment existing testplans
• Implement testbench and scoreboards / checkers
• Implement test sequences as per plan and debug failures
• Achieving 100% functional, code, and power coverage
• Work closely with designers, micro architects & f/w to resolve issues
• Ability to communicate & articulate clearly progress / issues with project leads

Must Have:

• Power and performance modeling or DV (C, SystemC, SystemVerilog, or MATLAB)
• Strong DV background (test plan development, test writing, UVM)
  • Hands-on experience with SV (SystemVerilog) and UVM (Universal Verification Methodology)
• Experience with UPF-based simulation flow
  • Experience with low power verification (UPF) and both static (VC LP) and dynamic (VCS NLP) power-aware verification flows
• 7+ years of proven experience as a DV engineer
  • Implied: Candidate will have hands-on experience with executable test plans and Coverage Driven verification
• Hands-on experience with Synopsys VCS / Verdi or Cadence Incisive tools
• 2+ years of experience with C/C++

Nice-to-Have Skills:

• Power and performance FPGA validation
• Hifi4, TIE, CNN, DSP, fixed point, floating point, SONICS, Python
• Experience with Power Aware GLS flow
• Tcl and Python (or similar) scripting language
• ASIC design experience
• Experience in formal property verification of complex compute blocks like DSP, CPU or HW accelerators
• Experience with complex SoCs
• Knowledge of coverage merging across simulation and formal
• MSEE/CS or equivalent experience

Years of Experience:

• 7+ years of proven experience as a DV engineer

Degrees/Certifications Required:

• Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
• Master's Degree preferred but not required

Interview Process:

• How many rounds of interviews? 2 rounds
• Types of Interviews: Technical and programming
• Interview Duration: 45 minutes

 

 


At SPECTRAFORCE, we are committed to maintaining a workplace that ensures fair compensation and wage transparency in adherence with all applicable state and local laws. This position’s starting pay is: $100.00/hr.